This invention relates generally to integrated circuits and more particularly, it relates to a full-level, fast CMOS output buffer for driving widely varying capacitive and inductive loads without significant output ringing.
As is well known, digital logic cicuits are widely used in the electronics field. One such use is for the interfacing between the logic of one integrated circuit device and another integrated circuit device. An output buffer is an important component for this interface function. The output buffer provides, when enabled, an output signal which is a function of a data input signal received from other logic circuitry of the integrated circuit.
Output buffer circuits typically use a pull-up field-effect transistor (FET) and a pull-down field-effect transistor connected to an output node. Depending upon the state of the data input signal and an enable signal, either the pull-up or pull-down field-effect transistor is quickly turned on and the other one of them is turned off.
Such prior art output buffer circuits generally have the output node connected to an external pin of an integrated circuit for driving other circuitry on other integrated circuits which may have widely varying capacitive and inductive loading effects. When the output node is making a high-to-low or low-to-high transition, oscillation or inductive ringing appears on the output node of the buffer circuit as a function of the energy remaining in the parasitic interconnect inductances following the output transition and the impedance of the output driver in a circuit that includes the output loads, buffer drivers, and the ground loop.
It would therefore be desirable to provide an output buffer for driving widely varying capacitive and inductive loads which has a significant reduction in inductive ringing at an output node. The output buffer circuit of the present invention includes a pull-up circuit formed of a first pull-up transistor and a second pull-up transistor and a pull-down circuit formed of a first pull-down transistor and a second pull-down transistor. The reduction in the inductive ringing at the output node is achieved by increasing the driving transistors' equivalent impedance at the output node towards the end of either a low-to-high or high-to-low transistion.